Amphithéâtre Maurice Halbwachs, Site Marcelin Berthelot
Open to all
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Abstract

The complexity of integrated circuits has been growing exponentially for almost 45 years, and this pace is unlikely to slow down. The complexity of today's circuits enables the monolithic realization of complete computer systems called SOCs (for System On Circuit), often with multiple processors. These systems are divided into sub-systems and isochronous zones, representing the size of the blocks that can be conventionally synchronized using clocks local to each block. Isochronous zones often correspond to functional entities, to groupings of them, or even to their divisions.

Communication between these isochronous zones can be asynchronous (GALS for Globally Asynchronous and Locally Synchronous) or synchronous (GSLS for Globally Synchronous and Locally Synchronous). We won't go into detail about GALS systems, which are widely popular in the SOC world and often implemented by micro-networks known as NOCs (for Network On Circuit). The aim of this presentation is to show that, contrary to popular belief, large-scale synchronous SOCs are possible. In-phase synchronization of isochronous zone clocks offers a number of advantages, such as single-cycle communication between neighboring isochronous zones, the assurance of eliminating any risk of metastability, and the ability to warn the network operator if there is a risk of leaving the synchronous operating domain. These properties provide a platform for SOCs adapted to high-reliability applications.

Speaker(s)

François Anceau

CNAM Paris, researcher at Lip6/SOC

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